Microcomputer Design Educational Environment City-1 on Verilog HDL and FPGA in 2001
for the junior students of the Department of Computer Engineering,
Faculty of Information Sciences, Hiroshima City University
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A video City-1 beyond pipelining is introducing the third 3 years (2001-2003) of City-1, which is an educational course held successfully by Ryuichi TAKAHASHI in microcomputer design using field programmable gate arrays (FPGAs) for junior students of the Department of Computer Engineering, Faculty of Information Sciences, Hiroshima City University until 2008.
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39 students, out of 50 students (80%),
completed the entire phases in 15 weeks this
year. 7 students completed superscalar RISC FPGA
computers.
An incompletely specified two stages pipelined superscalar RISC
description named RISC-2SS2, which I wrote in 983 lines for 9 modules
in Verilog HDL, was given to all of the students.
The superscalar structure for RISC-2SS2 uses a fetch-packet only
for two instructions.
The simple superscalar
example description seemed to be very effective, since the students have
to write down directly the cases when more than one instructions can
be issued simultaneously.
Ryuichi TAKAHASHI
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The best design awarded machines
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Takehiro
KITAHORI |
Satoshi
MINAMI |
Satoru
TAKEUCHI |
Taku
TORIMOTO |
Hidenori
YOSHIDA |
The other superscalar machines
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Daisuke
MURASHIMA |
Shoko
OHISHI(F) |
Manabu
WAKATSUKI |
Sound CISC machines
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Satoshi
KAWAMOTO |
Takashi
KAWASAKI |
Kazuhiko
KOBAYASHI |
Kenichiro
KONO |
Tomikazu
KONO |
Hiroko
MINAMI(F) |
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Yuki
NARUSE(F) |
Takashi
OKA |
Takeshi
OKA |
Junichi
SETO |
Yasuhiro
TANABE |
Mayumi
TANAKA(F) |
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Akihiko
UEKI |
Junya
YOSHINAGA |
Kengo
YOSHIMURA |
Sound RISC machines:
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Toshifumi
KAWAGUCHI |
Takahiro
KAWAKAMI |
Takashi
MASUDA |
Takashi
MASUDA |
Yosuke
MORITA |
Hiroshi
NOMURA |
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Tomohiro
OKABE |
Daisuke
SAKARIDANI |
Masayuki
SATO |
Satoshi
TOMITA |
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