Microcomputer Design Educational Environment City-1 on Verilog HDL and FPGA in 2004
for the junior students in the Department of Computer Engineering,
Faculty of Information Sciences, Hiroshima City University
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A video God's will is introducing the last 5 years (2004-2008) of City-1, which is an educational course held successfully by Ryuichi TAKAHASHI in microcomputer design using field programmable gate arrays (FPGAs) for junior students of the Department of Computer Engineering, Faculty of Information Sciences, Hiroshima City University.
I myself was healed many times by the BGM "God's will" which I composed in 2004.
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I decided to introduce 200,000 gates FPGA(Xilinx Spartan II XC2S200-5PQ208C) . In this very year, I also accepted a student from Germany who wished to join us.
An incompletely specified pipelined superscalar RISC having 3 stages named RISC-3RB4, which I wrote in Verilog HDL for 10 modules, was given to all of the students this year. Click
ACM,
IEEE
for more detail.
As a result, 7 students succeeded to implement out-of-order issue superscalar RISC. 6 of them increased the number of the entries of reorder buffer up to 8. For this purpose, 1 of them rewrite the buffer, which I wrote as a simple ring buffer, as real FIFO. 4 of them studied branch-penalty considering multiple-path execution. Another student implemented a table for the Euclidean algorithm. The other 7 students implemented a special instruction for multiplication. The other 3 students implemented subroutine call/return by introducing stacks.
Since I thought it is impossible for the students to solder the 200,000 gates FPGA (PQ208C) in this course, I asked the printing company for City-1 to put it on the board beforehand. 2 FPGAs were broken during this course. When I said "all occurrences happen according to God's will," to a student, he agreed and succeeded to implement VLIW by using prior 10,000 gates FPGA(Xilinx XC4010EPG191) keeping his head. Another broken FPGA was for the very student from Germany. He managed to find a very unique way to fix it, while I had been at a loss. This method was decided to be used again in 2006 and named "Rehkopf's Method" after the name of this German student.
In 2004, 36 out of 52 students completed the entire design and fabrication phases in 15 weeks. I thought 70% is not so bad, since this was the first year for 200,000 gates FPGA.
The number of the teaching assistants was increased from 1 to 2 this year. Master's course students Satoshi MINAMI and Sin'ichi MIURA worked as teaching assistants. These 2 students and me were all of the staffs in this year.
Ryuichi TAKAHASHI
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The best design awarded machines:
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Toshiyuki
IMAOKA |
Mitsuhiro
KIMURA |
Shunsuke
MATSUOKA |
Takekazu
TABATA |
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Yuki
YAMABE |
Masanori
YOSHIHARA |
Tetsuya
ZUYAMA |
These 7 students succeeded to implement out-of-order issue superscalar RISC
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VLIW:
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Shogo
KAWADU |
Kohichiroh
UEDA |
Superscalar RISC machines:
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Masato
ASADA |
Manami
AMIMOTO |
Daisuke
FUJIMOTO |
Tsukasa
FUJITA(F) |
Sho
HATANAKA |
Daisuke
HARA |
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Shunsuke
HARADA |
Daisuke
HIDAKA |
Mio
HIRANO(F) |
Hitomi
ISHIDA(F) |
Junichi
ISHIKURA |
Akihiko
ISHIZU |
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Masashi
ISOBE |
Yoshihiro
KIMURA |
Kazuyuki
NAKAMARU |
Kunihiko
NAKAMURA |
Kouji
OHWA |
Mai
SAKAMOTO(F) |
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Taiji
SASAOKA |
Kazuhiro
TAIRA |
Yusuke
TAKEMOTO |
Hiroshi
TOKUYASU |
Eri
UEDA(F) |
Takefumi
YAMADA |
Scalar CISC:
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Masanori
MIZUGUCHI |
Toru
NAKAMURA |
A student from Germany:
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Maximilian REHKOPF |
free download pieces composed byRyuichi TAKAHASHI :
Op.4: City-1 goes on,F-dur (2000)
for the pictures of the next 2 years of City-1 in 1999-2000 | mp4 | 4:12 | 12.8MB |
Op.5: Beyond pipelining,D-dur (2002)bR> for the pivtures of the next 3 years of City-1 in 20001-2003 | mp4 | 3:47 | 11.8MB |
Op.6: Adversity,g-mol (2003)
| mp4 | 3:03 | 7.0MB |
Op.7: God's will,fis-mol (2004)BR>for the pictures of the last 5 years of City-1 in 2004-2008 | mp4 | 4:22 | 12.0MB
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